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  1. Memory IP Design Engineer- (eFuse)

    de.jobsyn.org - Global Foundries - Karnataka, Ind
    4 days ago - experience with EDA (Cadence, Mentor Graphics, Synopsys…) tools for schematic design & simulations (Virtuoso - Save Job - - More

    View Job Details : Memory IP Design Engineer- (eFuse)

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  2. Memory IP Design Engineer- (eFuse/MTPM/OTP/MRAM/SRAM)

    de.jobsyn.org - Global Foundries - Karnataka, Ind
    6 days ago - experience with EDA (Cadence, Mentor Graphics, Synopsys…) tools for schematic design & simulations (Virtuoso - Save Job - - More

    View Job Details : Memory IP Design Engineer- (eFuse/MTPM/OTP/MRAM/SRAM)

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  3. Lead Memory IP Design Engineer- (eFuse/MTPM/OTP/MRAM/SRAM)

    de.jobsyn.org - Global Foundries - Karnataka, Ind
    20 days ago - experience with EDA (Cadence, Mentor Graphics, Synopsys…) tools for schematic design & simulations (Virtuoso - Save Job - - More

    View Job Details : Lead Memory IP Design Engineer- (eFuse/MTPM/OTP/MRAM/SRAM)

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  4. Senior VLSI Physical Design Integration Engineer

    de.jobsyn.org - NVIDIA - Westford, MA
    20 days ago - and IR Drop Analysis CAD tools from Synopsys (ICC2/DC/PT/STAR/ICV), Cadence - Save Job - - More

    View Job Details : Senior VLSI Physical Design Integration Engineer

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  5. Verification Engineer

    de.jobsyn.org - ManpowerGroup - Santa Clara, CA
    6 days ago - SOC verification. + Experience with Cadence or Synopsys Verification tools & Verdi. **What's in it for - Save Job - - More

    View Job Details : Verification Engineer

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  6. Senior Specialist I - Product Security & Privacy

    de.jobsyn.org - Philips - Bangalore, Ind
    20 days ago - IBM Appscan Source, HP Fortify, Synopsys BlackDuck) + Experience in Security automation framework - Save Job - - More

    View Job Details : Senior Specialist I - Product Security & Privacy

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  7. Integrated Photonics Staff Engineer

    de.jobsyn.org - ColdQuanta - Louisville, CO
    20 days ago - on experience with commercial design/simulation and layout software (Lumerical, Synopsys, etc.) + Ability to quickly grasp and navigate complex technical concepts - Save Job - - More

    View Job Details : Integrated Photonics Staff Engineer

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  8. Senior CPU Implementation Methodology Engineer

    de.jobsyn.org - NVIDIA - Santa Clara, CA
    20 days ago - a power user of synthesis and/or place and route EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong - Save Job - - More

    View Job Details : Senior CPU Implementation Methodology Engineer

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  9. Senior ASIC Timing Engineer

    de.jobsyn.org - NVIDIA - Westford, MA
    20 days ago - Power user of Static Timing tools like Synopsys PrimeTime or Cadence Tempus. + Solid experience - Save Job - - More

    View Job Details : Senior ASIC Timing Engineer

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  10. Physical Design - Sr engineer

    de.jobsyn.org - Qualcomm - Chennai, Ind
    20 days ago - concepts + Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI - Save Job - - More

    View Job Details : Physical Design - Sr engineer

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  11. Physical Design - engineer

    de.jobsyn.org - Qualcomm - Chennai, Ind
    4 days ago - concepts + Knowledge in Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI - Save Job - - More

    View Job Details : Physical Design - engineer

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  12. Mixed-Signal Design Verification and Validation Engineer

    de.jobsyn.org - Broadcom - San Jose, CA
    20 days ago - verification + Hands-on knowledge of standard industry EDA tools - Synopsys/Cadence + Experienced with GLS with & without parasitic - Save Job - - More

    View Job Details : Mixed-Signal Design Verification and Validation Engineer

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  13. Physical Design - Sr engineer

    de.jobsyn.org - Qualcomm - Chennai, Ind
    4 days ago - versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI - Save Job - - More

    View Job Details : Physical Design - Sr engineer

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  14. Senior Pixel Designer

    de.jobsyn.org - Teledyne - Waterloo, ON
    20 days ago - simulations (process/device/optoelectronic simulations using Synopsys, Silvaco) and optical simulations (Ray tracing/ - Save Job - - More

    View Job Details : Senior Pixel Designer

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  15. Senior Application Engineer (AE) - Aprisa P&R

    de.jobsyn.org - Siemens - Hsinchu, Twn
    20 days ago - IC design space + Expertise with Cadence Innovus, Synopsys IC Compiler I/II, Avatar Aprisa - Save Job - - More

    View Job Details : Senior Application Engineer (AE) - Aprisa P&R

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  16. STA Engineer

    de.jobsyn.org - Broadcom - San Jose, CA
    20 days ago - constraints for intricate SoC designs. + Experience with Synopsys TCM tool. + Perform static timing analysis (STA) - Save Job - - More

    View Job Details : STA Engineer

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  17. Global Alliance Manager, Developer Relations - Cadence

    de.jobsyn.org - NVIDIA - Santa Clara, CA
    20 days ago - Experience working at or with EDA companies (e.g. Cadence, Synopsys, Siemens EDA) with validated understanding of EDA - Save Job - - More

    View Job Details : Global Alliance Manager, Developer Relations - Cadence

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  18. Senior ASIC Design Engineer - GPU

    de.jobsyn.org - NVIDIA - Madison, AL
    11 days ago - VCS or equivalent simulation tools, debug tools like Verdi, Synopsys) + A solid understanding of Object Oriented - Save Job - - More

    View Job Details : Senior ASIC Design Engineer - GPU

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  19. Senior Async and IO Timing Methodology Engineer

    de.jobsyn.org - NVIDIA - Santa Clara, CA
    20 days ago - flow development. + Experience working with STA tools like Synopsys PrimeTime or Cadence Tempus. + Deep understanding - Save Job - - More

    View Job Details : Senior Async and IO Timing Methodology Engineer

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  20. Analog Mixed Signal Layout Designer

    de.jobsyn.org - Broadcom - San Jose, CA
    20 days ago - standard EDA tools from Cadence, Mentor and Synopsys. + Experience with layout of high-performance high-speed analog mixed-signal - Save Job - - More

    View Job Details : Analog Mixed Signal Layout Designer

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