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Staff / Sr. Staff Digital Design Engineer, Interface IP

click.appcast.io - Synopsys, Inc. - Sunnyvale, CA

6 days ago - IP Description & Requirements We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our - Save Job - Email - More

View Job Details : Staff / Sr. Staff Digital Design Engineer, Interface IP
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Analog Layout Design Engineer

www.ziprecruiter.com - IBA Infotech Inc. - Mountain View, CA

23 days ago - EDA Tools: Cadence, Mentor, Synopsys Mixed-Signal Layout (TIAs, CMOS - Save Job - Email - More

View Job Details : Analog Layout Design Engineer
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ASIC Engineer

click.appcast.io - TPI Global Solutions - Santa Clara, CA

15 days ago - timing checks and improve efficiency. * Analyze timing reports (Synopsys Primetime/Design Compiler) to identify and resolve design/constraint - Save Job - Email - More

View Job Details : ASIC Engineer
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Machine Learning, Staff Engineer

click.appcast.io - Synopsys, Inc. - Sunnyvale, CA

6 days ago - driven EDA tools. * Enhancing the performance and quality of Synopsys’ AI-driven EDA tools. * Collaborating with - Save Job - Email - More

View Job Details : Machine Learning, Staff Engineer
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Senior Architect / Director, Advanced Architecture, High Speed SerDes

click.appcast.io - Synopsys, Inc. - Sunnyvale, CA

6 days ago - Are: At Synopsys, we drive the journal articles, and represent Synopsys at industry events - Save Job - Email - More

View Job Details : Senior Architect / Director, Advanced Architecture, High Speed SerDes
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Digital Design Engineer

www.ziprecruiter.com - Code Metal - Boston, MA

4 days ago - debugging using tools such as: Cadence Xcelium, Synopsys VCS, Xilinx xsim * Write Python scripts for - Save Job - Email - More

View Job Details : Digital Design Engineer
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Principal Devops Engineer (Modernization, Conan, C/C++)

click.appcast.io - Synopsys - Mountain View, CA

6 days ago - Are: At Synopsys, we drive the hiring process. At Synopsys, we want talented people of - Save Job - Email - More

View Job Details : Principal Devops Engineer (Modernization, Conan, C/C++)
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Principal Devops Engineer (Modernization, Conan, C/C++)

click.appcast.io - Synopsys - California, MO

6 days ago - Are: At Synopsys, we drive the hiring process. At Synopsys, we want talented people of - Save Job - Email - More

View Job Details : Principal Devops Engineer (Modernization, Conan, C/C++)
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ASIC Engineering Technical Leader - SDC

click.appcast.io - Cisco Systems - San Jose, CA

6 days ago - boundaries). * Experience with synthesis tools (eg. Synopsys DC/DCG/FC), Verilog/System - Save Job - Email - More

View Job Details : ASIC Engineering Technical Leader - SDC
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Senior Photonics Design Automation and Layout Engineer

click.appcast.io - Aeva - Mountain View, CA

6 days ago - Proficiency with commercial photonics layout software such as Cadence, Synopsys, Luceda, and Klayout. * Familiarity with semiconductor - Save Job - Email - More

View Job Details : Senior Photonics Design Automation and Layout Engineer
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Principle Emulation Development Engineer

click.appcast.io - Synopsys, Inc. - Sunnyvale, CA

6 days ago - Are: At Synopsys, we drive the and Diversity: Synopsys considers all applicants - Save Job - Email - More

View Job Details : Principle Emulation Development Engineer
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Design Verification Engineer

click.appcast.io - Eximietas Design - San Jose, CA

6 days ago - methodologies. * Experience with verification tools from Synopsys and Cadence, including VCS and Xsim. Integration - Save Job - Email - More

View Job Details : Design Verification Engineer
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ASIC Design Engineer

click.appcast.io - Broadcom - San Jose, CA

6 days ago - coding and Lint tools * Synthesis using Synopsys tool suite * Timing Analysis using Synopsys - Save Job - Email - More

View Job Details : ASIC Design Engineer
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ASIC Design Engineer - Design & Timing Constraints

click.appcast.io - Cisco Systems - San Jose, CA

6 days ago - async boundaries) * Experience with synthesis tools (eg. Synopsys DC/DCG/FC), Verilog/System - Save Job - Email - More

View Job Details : ASIC Design Engineer - Design & Timing Constraints
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Senior RTL Design Engineer

click.appcast.io - Seneca Resources - Santa Clara, CA

11 days ago - Gate-Level Simulations (GLS) using Synopsys VCS and Verdi * Develop and deliver SoC-level - Save Job - Email - More

View Job Details : Senior RTL Design Engineer
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ASIC Engineering Technical Leader - SDC

click.appcast.io - Cisco - San Jose, CA

6 days ago - boundaries). * Experience with synthesis tools (eg. Synopsys DC/DCG/FC), Verilog/System - Save Job - Email - More

View Job Details : ASIC Engineering Technical Leader - SDC
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ASIC Engineering Technical Leader - SDC

click.appcast.io - Cisco Systems, Inc. - San Jose, CA

6 days ago - . * Experience with synthesis tools (e.g., Synopsys DC/DCG/FC) and Verilog/SystemVerilog - Save Job - Email - More

View Job Details : ASIC Engineering Technical Leader - SDC
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ASIC Engineering Technical Leader - SDC

click.appcast.io - Cisco Systems, Inc. - California, MO

6 days ago - . * Experience with synthesis tools (e.g., Synopsys DC/DCG/FC) and Verilog/SystemVerilog - Save Job - Email - More

View Job Details : ASIC Engineering Technical Leader - SDC
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Senior RTL Design Engineer

click.appcast.io - Seneca Resources - Santa Clara, CA

3 days ago - Gate-Level Simulations (GLS) using Synopsys VCS and Verdi * Develop and deliver SoC-level - Save Job - Email - More

View Job Details : Senior RTL Design Engineer
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ASIC DESIGN FOR TEST ENGINEER - Acacia

click.appcast.io - Cisco - San Jose, CA

6 days ago - techniques, ATPG, and post-silicon DVT. * Proficiency with Synopsys/Mentor DFT tools. Preferred Qualifications - Save Job - Email - More

View Job Details : ASIC DESIGN FOR TEST ENGINEER - Acacia
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