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  1. Senior/Staff/Senior Staff Engineer - Performance Modelling

    de.jobsyn.org - Renesas - Noida, Ind
    18 days ago - Develop and maintain performance models for SoC designs using Synopsys Platform Architect or Emulation Platform + Collaborate - Save Job - - More

    View Job Details : Senior/Staff/Senior Staff Engineer - Performance Modelling

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  2. SoC RTL Design Manager - Director

    de.jobsyn.org - Qualcomm - Bangalore, Ind
    18 days ago - Ability to review top level test plans - Expertise in Synopsys Design Compiler Synthesis and formal - Save Job - - More

    View Job Details : SoC RTL Design Manager - Director

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  3. DSP / NPU Design Verification Sr Lead Engineer

    de.jobsyn.org - Qualcomm - Bangalore, Ind
    18 days ago - System Verilog/UVM, and with simulators from Synopsys/Mentor/Cadence . · Scripting/Automation - Save Job - - More

    View Job Details : DSP / NPU Design Verification Sr Lead Engineer

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  4. DSP / NPU Design Verification Sr Engineer

    de.jobsyn.org - Qualcomm - Bangalore, Ind
    4 days ago - System Verilog/UVM, and with simulators from Synopsys/Mentor/Cadence . · Scripting/Automation - Save Job - - More

    View Job Details : DSP / NPU Design Verification Sr Engineer

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  5. Network Packet Processing Core DV

    de.jobsyn.org - Qualcomm - Bangalore, Ind
    18 days ago - C. + HW verification using Cadence and Synopsys simulator tools, SV/UVM based TB development - Save Job - - More

    View Job Details : Network Packet Processing Core DV

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  6. SoC Physical Design Verification Engineer

    de.jobsyn.org - Apple - San Diego, CA
    10 days ago - physical verification such as Mentor Calibre, and/or Synopsys ICV. + Layout design experience. **Pay & Benefits - Save Job - - More

    View Job Details : SoC Physical Design Verification Engineer

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  7. Senior CAD Physical Design Engineer

    de.jobsyn.org - Cisco - Caesarea, Isr
    18 days ago - Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.) * Great teammate, self-learning skills - Save Job - - More

    View Job Details : Senior CAD Physical Design Engineer

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  8. Senior Analog Layout Engineer

    de.jobsyn.org - Capgemini - Santa Clara, CA
    17 days ago - thermal and electromigration-aware techniques. + Proficient in Synopsys, Cadence, and Mentor layout tools; Python scripting - Save Job - - More

    View Job Details : Senior Analog Layout Engineer

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  9. Physical Design Engineer

    de.jobsyn.org - Apple - Cupertino, CA
    9 days ago - experience must include the following skills: + Using Cadence or Synopsys Physical Design tool, including use wire routing concepts - Save Job - - More

    View Job Details : Physical Design Engineer

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  10. Physical Design Engineer - Mixed Signal IP

    de.jobsyn.org - Qualcomm - San Diego, CA
    11 days ago - Experience with industry leading tools + Cadence + Synopsys + Mentor + Ansys + Working knowledge of programming - Save Job - - More

    View Job Details : Physical Design Engineer - Mixed Signal IP

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  11. SoC Physical Design Verification Engineer

    de.jobsyn.org - Apple - San Diego, CA
    10 days ago - used for physical verification: Mentor Calibre, and/or Synopsys ICV. + Tapeout experience with a track record of successful signoff - Save Job - - More

    View Job Details : SoC Physical Design Verification Engineer

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  12. Senior Lead Engineer, Hardware Design

    de.jobsyn.org - Celestica - Penang, Mys
    18 days ago - preferred), Sigrity Power SI. • Experience with Synopsys HSPICE and/or Keysight ADS for both time and frequency - Save Job - - More

    View Job Details : Senior Lead Engineer, Hardware Design

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  13. Senior Lead Engineer, Hardware Design

    de.jobsyn.org - Celestica - Penang, Mys
    18 days ago - preferred), Sigrity Power SI. • Experience with Synopsys HSPICE and/or Keysight ADS for both time and frequency - Save Job - - More

    View Job Details : Senior Lead Engineer, Hardware Design

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  14. Physical Design Lead – Custom Silicon Management

    de.jobsyn.org - Apple - Austin, TX
    18 days ago - of at least one of the industry CAD tools - Cadence, Synopsys, Mentor or Atoptech. + Proficient in Static - Save Job - - More

    View Job Details : Physical Design Lead – Custom Silicon Management

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  15. Network Packet Processing Core DV Sr Engineer

    de.jobsyn.org - Qualcomm - Bangalore, Ind
    18 days ago - C. + HW verification using Cadence and Synopsys simulator tools, SV/UVM based TB development - Save Job - - More

    View Job Details : Network Packet Processing Core DV Sr Engineer

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  16. Network Packet Processing Core DV Sr Engineer

    de.jobsyn.org - Qualcomm - Bangalore, Ind
    18 days ago - C. + HW verification using Cadence and Synopsys simulator tools, SV/UVM based TB development - Save Job - - More

    View Job Details : Network Packet Processing Core DV Sr Engineer

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  17. Senior Analog Layout Engineer

    de.jobsyn.org - Capgemini - Santa Clara, CA
    18 days ago - thermal and electro migration-aware techniques. + Proficient in Synopsys, Cadence, and Mentor layout tools; Python scripting - Save Job - - More

    View Job Details : Senior Analog Layout Engineer

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  18. Physical Synthesis Implementation Engineer

    de.jobsyn.org - Qualcomm - San Diego, CA
    16 days ago - required upon entry)** + Familiarity with EDA tools such as Synopsys Design Compiler, Cadence Genus, or similar - Save Job - - More

    View Job Details : Physical Synthesis Implementation Engineer

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  19. Staff GPU Physical Design Engineer

    de.jobsyn.org - Qualcomm - Bangalore, Ind
    18 days ago - Well versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence - Save Job - - More

    View Job Details : Staff GPU Physical Design Engineer

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  20. Sr Staff GPU Physical Design Engineer

    de.jobsyn.org - Qualcomm - Noida, Ind
    18 days ago - Well versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence - Save Job - - More

    View Job Details : Sr Staff GPU Physical Design Engineer

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