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Server Chipset Power Engineer

de.jobsyn.org - Qualcomm - San Diego, CA

28 days ago - Experience in modeling peak current transients of the various IPs in the system + Strong understanding of silicon test methodologies - Save Job - Email - More

View Job Details : Server Chipset Power Engineer
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SoC Infrastructure IP System HW Architect - RAS

de.jobsyn.org - Qualcomm - Santa Clara, CA

28 days ago - of a multi-disciplinary group involved in the definition and design of PlatformSOC Infra HW IPs with ARM Architecture - Save Job - Email - More

View Job Details : SoC Infrastructure IP System HW Architect - RAS
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VLSI Design Engineer for Server / Data Center Products

de.jobsyn.org - Qualcomm - Austin, TX

28 days ago - Proven knowledge in the Server/ Data Center IPs, protocols, and interfaces + Great understanding of design - Save Job - Email - More

View Job Details : VLSI Design Engineer for Server / Data Center Products
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Wireless R&D IP Design Engineer -Sr

de.jobsyn.org - Qualcomm - Bangalore, Ind

28 days ago - Group, Engineering Group > Hardware Engineeringdesign engineer to work on WRD IPs for Qualcomm’s best in - Save Job - Email - More

View Job Details : Wireless R&D IP Design Engineer -Sr
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Digital ASIC Design Engineer for High-Speed Interfaces

de.jobsyn.org - Qualcomm - San Diego, CA

28 days ago - Group, Engineering Group > ASICS Engineeringimproving power, performance, and area of the IPs - Assist in running the full - Save Job - Email - More

View Job Details : Digital ASIC Design Engineer for High-Speed Interfaces
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Mixed Signal SVE Engineer

de.jobsyn.org - Qualcomm - San Diego, CA

28 days ago - to support the silicon bring-up efforts for mixed signal IPs, such as **DDRPHY** and high-speed IOs. In this role, you - Save Job - Email - More

View Job Details : Mixed Signal SVE Engineer
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SOC Verification and Methodology Engineer - Sr Staff

de.jobsyn.org - Qualcomm - San Diego, CA

28 days ago - techniques and methodologies to verify varied design IPs in addition to system-level integration validation aspects - Save Job - Email - More

View Job Details : SOC Verification and Methodology Engineer - Sr Staff
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SIPI Engineer, Senior to Staff level

de.jobsyn.org - Qualcomm - Hsinchu City, Twn

28 days ago - communicate with PHY owners to understand the Specs for various IPs such as PCIe, UFS, USB, MIPI, LPDDR, etc - Save Job - Email - More

View Job Details : SIPI Engineer, Senior to Staff level
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Memory System Engineer

de.jobsyn.org - Qualcomm - Shanghai, Chn

28 days ago - platforms - Support silicon bringup and debug of mixed singal IPs like DDRPHY, high speed IOs. - Development and enhance - Save Job - Email - More

View Job Details : Memory System Engineer
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Memory System Engineer

de.jobsyn.org - Qualcomm - Shanghai, Chn

28 days ago - platforms - Support silicon bringup and debug of mixed singal IPs like DDRPHY, high speed IOs. - Development and enhance - Save Job - Email - More

View Job Details : Memory System Engineer
Research Tools: More information about jobs in Shanghai, Chn
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Engineer - Graphics Driver Development

de.jobsyn.org - Qualcomm - Bangalore, Ind

28 days ago - Op, and other Multimedia IPs. Performance profilingmaking may affect work beyond immediate work group. • Requires verbal and written - Save Job - Email - More

View Job Details : Engineer - Graphics Driver Development
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Low Power ASIC Engineer (Next-Gen, High-Speed Memory Subsystem)

de.jobsyn.org - Qualcomm - San Diego, CA

28 days ago - Group, Engineering Group > ASICS Engineeringcritical power analysis of critical design IPs for path to DDR. This - Save Job - Email - More

View Job Details : Low Power ASIC Engineer (Next-Gen, High-Speed Memory Subsystem)
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Digtal Bench Characterization Engineer, Sr Lead

de.jobsyn.org - Qualcomm - Bangalore, Ind

28 days ago - PC DDR 2/3/4 protocol, timing diagrams, HSIO IPs PHY level understanding and Electrical parametric compliance specifications - Save Job - Email - More

View Job Details : Digtal Bench Characterization Engineer, Sr Lead
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Emulation(FPGA Design) Engineer /Bluetooth - Staff

de.jobsyn.org - Qualcomm - Bangalore, Ind

28 days ago - Group, Engineering Group > Hardware EngineeringBluetooth and other PAN IPs on Qualcomm proprietary as - Save Job - Email - More

View Job Details : Emulation(FPGA Design) Engineer /Bluetooth - Staff
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Operations Program Manager, Sr

de.jobsyn.org - Qualcomm - San Diego, CA

28 days ago - Engineering, Package and Reliability teams and the IPS group to ensure on time delivery, evaluation and launch of Front - Save Job - Email - More

View Job Details : Operations Program Manager, Sr
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Wi-Fi/ PON/ Ethernet -Product Management, up to Director

de.jobsyn.org - Qualcomm - Taipei, Twn

28 days ago - filtering, QoS, packet classification, DPI, security system, wireless IDS/IPS, traffic and application visibility, network instrumentation and telemetry. + Proven - Save Job - Email - More

View Job Details : Wi-Fi/ PON/ Ethernet -Product Management, up to Director
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Analog/Mixed Signal ASIC Design Engineer

de.jobsyn.org - Qualcomm - Irvine, CA

28 days ago - Group, Engineering Group > Analog Mixed Signalhigh-performance and low-power mixed-signal IPs (SerDes, DDR, - Save Job - Email - More

View Job Details : Analog/Mixed Signal ASIC Design Engineer
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WLAN Phy RTL Design- Sr lead/Staff/Sr Staff/Principal Engineer

de.jobsyn.org - Qualcomm - Bangalore, Ind

28 days ago - 802.11 Working Group is continually architecting and developing complex IPs. + Expertise in digital design - Save Job - Email - More

View Job Details : WLAN Phy RTL Design- Sr lead/Staff/Sr Staff/Principal Engineer
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Modem Hardware Modeling, Senior Engineer

de.jobsyn.org - Qualcomm - Bangalore, Ind

28 days ago - Group, Engineering Group > Hardware Engineeringchipsets in modem WWAN IPs **Roles and Responsibilities - Save Job - Email - More

View Job Details : Modem Hardware Modeling, Senior Engineer
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Staff ASIC Design Verification Engineer

de.jobsyn.org - Qualcomm - Bangalore, Ind

28 days ago - verification team in verifying the Digital Low Power IPs for exciting products targeted for 5G, AI/ - Save Job - Email - More

View Job Details : Staff ASIC Design Verification Engineer
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