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  1. Senior RTL Design Engineer

    www.talent.com - Bowmore Group - Newark, CA
    11 hours ago - configuring the IPs from Standard Vendors like Synopsys. Work with our design and verification teams spread across - Save Job - - More

    View Job Details : Senior RTL Design Engineer

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  2. CPU Physical Design Engineer (STA)

    de.jobsyn.org - Intel - Bengaluru, Ind
    20 hours ago - designs- Timing signoff flows/tools experience both/either Synopsys/Cadence tools- Very good knowledge on Timing - Save Job - - More

    View Job Details : CPU Physical Design Engineer (STA)

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  3. CPU Physical Design Engineer (FCL)

    de.jobsyn.org - Intel - Bengaluru, Ind
    20 hours ago - knowledge of APR tools (either/or both Cadence/Synopsys) - Ability to handle new feature feasibility studies - Save Job - - More

    View Job Details : CPU Physical Design Engineer (FCL)

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  4. 3DIC Design Methodology Lead Engineer

    de.jobsyn.org - Intel - Bengaluru, Ind
    20 hours ago - is a plus. Experience with Cadence Integrity or Synopsys 3DIC compiler is a plus Experience in Full - Save Job - - More

    View Job Details : 3DIC Design Methodology Lead Engineer

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  5. Executive Account Manager

    click.appcast.io - Synopsys Inc - Texas
    1 day ago - At Synopsys, we’re at the heart of thetechnologies. As a Synopsys Global Account - Save Job - - More

    View Job Details : Executive Account Manager

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  6. Senior Staff Static Timing Analysis (STA) Engineer

    www.topusajobs.com - Marvell Semiconductor, Inc. - Boise, ID
    1 day ago - effort with a small team of engineers * Practical experience with Synopsys Timing Tools, such as Primetime and Tweaker - Save Job - - More

    View Job Details : Senior Staff Static Timing Analysis (STA) Engineer

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  7. Design Enablement Engineer (Hybrid)

    click.appcast.io - BAE Systems - Nashua, NH
    2 days ago - /Assura/Calibre; Keysight ADS; Synopsys; Matlab * Understanding of analog/digital/mixed-signal design - Save Job - - More

    View Job Details : Design Enablement Engineer (Hybrid)

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  8. Senior CAD/EDA Engineer, Texas Institute for Electronics, Cockrell School of Engineering

    click.appcast.io - The University of Texas at Austin - Austin, TX
    2 days ago - standard EDA tools and physical synthesis from Cadence, Synopsys, Siemens, Ansys, or Keysight tool suites - Save Job - - More

    View Job Details : Senior CAD/EDA Engineer, Texas Institute for Electronics, Cockrell School of Engineering

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  9. Semiconductor Engineer

    click.appcast.io - Mastech Digital - Phoenix, AZ
    2 days ago - languages TCL/Perl/Python * Experience with Synopsys DFT tools (Tetramax, DFT compiler - Save Job - - More

    View Job Details : Semiconductor Engineer

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  10. Senior Product Engineering Manager

    click.appcast.io - SIEMENS PLM SOFTWARE, INC. - Fremont, CA
    2 days ago - designs; 7.Working with commercial place and route tools such as Synopsys-ICC2/FC, Cadence-Innovus, or Siemens - Save Job - - More

    View Job Details : Senior Product Engineering Manager

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  11. Senior Product Engineer- Physical Design and Verification

    click.appcast.io - SIEMENS PLM SOFTWARE, INC. - Fremont, CA
    2 days ago - flows at 16nm or below using Cadence Innovus and/or Synopsys Fusion Compiler. * Proficient with physical and electrical - Save Job - - More

    View Job Details : Senior Product Engineer- Physical Design and Verification

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  12. Applications Engineer - Principal

    click.appcast.io - SIEMENS PLM SOFTWARE, INC. - Fremont, CA
    2 days ago - with EDA tools, such as Questa CDC, Synopsys Design Compiler, PrimeTime, SpyGlass tools - Save Job - - More

    View Job Details : Applications Engineer - Principal

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  13. Hardware Design Engineer 5

    de.jobsyn.org - Actalent - Mountain View, CA
    2 days ago - + FPGA Timing/Speed Optimization + Synopsys HAPS System + C/C + AXI Bus + Microprocessor - Save Job - - More

    View Job Details : Hardware Design Engineer 5

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  14. Analog IC Layout Design Engineer

    de.jobsyn.org - Renesas - 
    2 days ago - ensure high quality. 2. Utilize EDA tools (Cadence and Synopsys) for layout design and all related verification items, perform all layout activities - Save Job - - More

    View Job Details : Analog IC Layout Design Engineer

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  15. Analog IC Layout Design Engineer

    de.jobsyn.org - Renesas - 
    2 days ago - ensure high quality. 2. Utilize EDA tools (Cadence and Synopsys) for layout design and all related verification items, perform all layout activities - Save Job - - More

    View Job Details : Analog IC Layout Design Engineer

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  16. CPU Synthesis CAD Engineer

    de.jobsyn.org - Qualcomm - Bangalore, Ind
    2 days ago - industry-standard synthesis tools such as Cadence Genus or Synopsys FusionCompiler, and front-end signoff tools such as Cadence - Save Job - - More

    View Job Details : CPU Synthesis CAD Engineer

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  17. Hardware Systems Engineer, Silicon

    de.jobsyn.org - Meta - Bangalore, Ind
    2 days ago - Palladium, Protium, Zebu, Veloce, Cadence, Mentor, Synopsys **Industry:** Internet - Save Job - - More

    View Job Details : Hardware Systems Engineer, Silicon

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  18. Applications Engineer Physical Design/Fill - (Design Enablement)

    de.jobsyn.org - Intel - Hillsboro, OR
    2 days ago - to layout, schematic entry using Cadence Virtuoso and Synopsys Custom Designer - Development/support or handling - Save Job - - More

    View Job Details : Applications Engineer Physical Design/Fill - (Design Enablement)

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  19. FIP Physical Design and QA Engineer

    de.jobsyn.org - Intel - Austin, TX
    2 days ago - experience. + 2+ years of experience with physical synthesis, place, and route using Synopsys Fusion Compiler or Cadence Genus/Innovus - Save Job - - More

    View Job Details : FIP Physical Design and QA Engineer

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  20. Senior ASIC Designer

    click.appcast.io - Western Digital - Roseville, CA
    3 days ago - tools for synthesis, place and route, and timing analysis (e.g., Cadence, Synopsys). * Deep understanding of digital design principles, including FSMs, data - Save Job - - More

    View Job Details : Senior ASIC Designer

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